/**************************************************************************************************
  Filename:       zboot_interrupt_stubs.s51
  Revised:        $Date: 2006-01-15 11:09:27 -0700 Sun, 15 Jan 2006) $
  Revision:       $Revision: 9377 $

  Description:    Describe the purpose and contents of the file.


  Copyright 2006-2007 Texas Instruments Incorporated. All rights reserved.

  IMPORTANT: Your use of this Software is limited to those specific rights
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  who downloaded the software, his/her employer (which must be your employer)
  and Texas Instruments Incorporated (the "License").  You may not use this
  Software unless you agree to abide by the terms of the License. The License
  limits your use, and you acknowledge, that the Software may not be modified,
  copied or distributed unless embedded on a Texas Instruments microcontroller
  or used solely and exclusively in conjunction with a Texas Instruments radio
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**************************************************************************************************/

OFFSET   EQU    0x800

                COMMON  INTVEC(1)
                ;
                ; the interrupt vectors in the boot code simply jump to the user's LJMP
                ; instruction based at the known offset of 0x800 (flash page 1).
                ;
                ; the boot code does not use interrupts.

   ORG     0x0003      ; RF Tx FIFO underflow and overflow
   LJMP  $ + OFFSET
   ORG     0x000B      ; ADC end of conversion
   LJMP  $ + OFFSET
   ORG     0x0013      ; USART0 Rx complete
   LJMP  $ + OFFSET
   ORG     0x001B      ; USART1 Rx complete
   LJMP  $ + OFFSET
   ORG     0x0023      ; AES encryption/decryption complete
   LJMP  $ + OFFSET
   ORG     0x002B      ; Sleep timer compare
   LJMP  $ + OFFSET
   ORG     0x0033      ; Port 2 inputs
   LJMP  $ + OFFSET
   ORG     0x003B      ; USART0 Tx complete
   LJMP  $ + OFFSET
   ORG     0x0043      ; DMA transfer complete
   LJMP  $ + OFFSET
   ORG     0x004B      ; Timer 1 (16-bit) capture/compare/overflow
   LJMP  $ + OFFSET
   ORG     0x0053      ; Timer 2 (MAC timer)
   LJMP  $ + OFFSET
   ORG     0x005B      ; Timer 3 (8-bit) capture/compare/overflow
   LJMP  $ + OFFSET
   ORG     0x0063      ; Timer 4 (8-bit) capture/compare/overflow
   LJMP  $ + OFFSET
   ORG     0x006B      ; Port 0 inputs
   LJMP  $ + OFFSET
   ORG     0x0073      ; USART1 Tx complete
   LJMP  $ + OFFSET
   ORG     0x007B      ; Port 1 inputs
   LJMP  $ + OFFSET
   ORG     0x0083      ; RF general interrupts
   LJMP  $ + OFFSET
   ORG     0x008B      ; Watchdog overflow in timer mode
   LJMP  $ + OFFSET

   END

